This invention relates to chemical mechanical polishing compositions and methods of use the polishing compositions for polishing semiconductor substrates.
Chemical mechanical polishing (also referred to as chemical mechanical planarization, abbreviated as CMP) and chemical mechanical polishing compositions (also known as polishing slurries, polishing formulations, slurries, slurry compositions, or polishing compositions) for planarization of semiconductor substrates are now widely known to those skilled in the art.
An introductory reference on CMP is: “Chemical-Mechanical Polish” by G. B. Shinn et al., Chapter 15, pages 415-460, in Handbook of Semiconductor Manufacturing Technology, editors: Y. Nishi and R. Doering, Marcel Dekker, New York City (2000).
A semiconductor substrate, such as a wafer, or an integrated circuit, usually has one or more layers of thin films comprising different materials deposited on its surface.
In a typical CMP process, a semiconductor substrate is placed in contact with a rotating polishing pad attached to a platen. A CMP composition, typically a chemical composition having abrasives, is supplied to the pad during CMP processing. The pad, the CMP composition, and the substrate, are moved relative to one another. Thus, the CMP process accomplishes the polishing (or planarization) by chemically and mechanically interacting with the substrate, that is, concurrent chemical and mechanical abrasion of the surface of the substrate. Polishing continues until the desired thickness of the film on the substrate is removed.
Development of the next generation of semiconductor devices has emphasized the use of materials having a greater hardness and other unique properties for high-power, high-temperature, and high-frequency operation applications.
Silicon Nitride is a high strength hard material that can have a number of uses, such as an electrical insulator, a chemical diffusion barrier, a dielectric in capacitors, or an etch stop mask. Silicon carbide is a material with unique combination of electrical and thermo-physical properties, such as high practical operating temperature, good corrosion resistance, and high thermal conductivity. However, Si3N4 and SiC are significantly harder and chemically inert than other materials comprising an integrated circuit.
CMP for polishing semiconductor Si3N4 and SiC substrates has been described further in patents, patent publications and literature publications.
U.S. Pat. No. 6,218,305 disclosed a method for polishing a composite comprised of silica and silicon nitride wherein a polishing composition is used comprising: an aqueous medium, abrasive particles, a surfactant, an organic polymer viscosity modifier which increases the viscosity of the composition, and a compound which complexes with the silica and silicon nitride wherein the complexing agent has two or more functional groups each having a dissociable proton, the functional groups being the same or different.
US 2008/0057713 or U.S. Pat. No. 7,678,700 taught a method of chemically-mechanically polishing a substrate comprising at least one layer of silicon carbide with a polishing composition comprising a liquid carrier, an abrasive, and an oxidizing agent.
US20100144149 disclosed a method for selectively removing silicon carbide from the surface of a substrate in preference to silicon dioxide. The method comprises abrading a surface of substrate with a polishing composition that comprises a particulate abrasive, at least one acidic buffering agent, and an aqueous carrier.
US 20100258528 taught slurry compositions and chemically activated CMP methods for polishing a substrate having a silicon carbide surface using such slurries. In such methods, the silicon carbide surface is contacted with a CMP slurry composition that comprises i) a liquid carrier; and ii) a plurality of particles having at least a soft surface portion, wherein the soft surface portion includes a transition metal compound that provides a Mohs hardness < or =6; and optionally iii) an oxidizing agent. The oxidizing agent can include a transition metal. The slurry is moved relative to the silicon carbide comprising surface, wherein at least a portion of the silicon carbide surface is removed.
US20120003901 disclosed a highly dilutable chemical mechanical polishing concentrate comprising an abrasive, an acid, a stabilizer, and water with a point-of-use pH ranging from 2.2-3.5 for planarizing current and next generation semiconductor integrated circuit FEOL/BEOL substrates.
U.S. Pat. No. 8,043,970 disclosed high selectivity of polishing silicon nitride with respect to silicon oxide. The slurry compositions included an agent for reducing the oxide polishing rate.
U.S. Pat. No. 6,995,090 disclosed a polishing slurry for CMP of SiC series compound film. The polishing slurry includes colloidal silica abrasive, and at least one acid selected from the group consisting of amino acid having a benzene ring and an organic acid having a heterocycle.
U.S. Pat. No. 8,247,328 disclosed a method for CMP of a substrate comprising at least one layer of single crystal silicon carbide. The composition used in the method contains liquid carrier, an abrasive, a catalyst comprising a transition metal composition, and an oxidizing agent.
US 2007/0209287 taught to polish a substrate containing silicon nitride with a polishing composition comprising an abrasive and a nitride accelerator.
US 2009/0215268 disclosed a polishing composition for SiC comprised of an abrasive and an oxidizer mixed in an acidic condition.
JP2012-040671A or WO 2012/026329, described polishing composition for silicon nitride comprised of colloidal silica in which a sulfonic acid, carboxylic acid, or another such organic acid are immobilized.
US2010/0009538 disclosed a polishing composition for silicon nitride having pH of 2.5 to 5.0 comprising colloidal silica and an organic acid that has at least one sulfonic acid group or phosphonic acid group in the molecular structure.
US2008/0200033 disclosed polishing Compound, Method for Polishing Surface to be Polished, and Process for Producing Semiconductor Integrated Circuit Device.
WO 2010/065125 taught Method for Selective polishing of Silicon carbide with respect to silicon dioxide. The method used a composition comprising abrasive, at least one acidic buffering agent, and an aqueous carrier.
US2007/0298612 taughts a method for polishing silicon nitride-containing substrates using a composition comprised of colloidal silica, at least one acidic component with pKa in the range of 1 to about 4.5, and an aqueous carrier.
A semiconductor substrate usually has layers made of different materials, for example, silicon nitride (Si3N4, or “SiN”), silicon carbide (SiC or “SiC”), silicon oxide (SiO2) dielectric films, and/or “SiCxNy”. In “SiCxNy” films, x ranges from 0.1 wt % to 55 wt %, y ranges from 0.1 wt % to 32 wt %. When carbon is in low concentration, the “SiCxNy” films are described as carbon doped “SiN” films; while when nitrogen is in low concentration, “SiCxNy” films are described as nitrogen doped “SiC” films.
The CMP polishing becomes more challenge, since selectivity is required to remove one material without significantly removing other materials. The development of CMP slurries for polishing Si3N4, SiC and/or “SiCxNy” with high removal rates, while being selective to other dielectric materials, such as silicon oxide (SiO2), presents a formidable challenge.
Thus, there remains a need for alternative CMP compositions and methods of polishing semiconductor substrates that can provide reasonable removing rates, as well as selective polishing.